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IP LockAES Encryption IP Security System

IPLock

IP Lock is FPGA logic security system which used very reliable AES encryption technology. IP properties in FPGA are protected from illegal copy by only including IP Lock in FPGA and connecting with encryption controller chip.


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Demo video on youtube

Features

  • Strong security by AES encryption
  • Change & encrypt authentication data at about 200msec cycle
  • Generate true random authentication data by natural random number generator
  • Stop user logic when removing the chip
  • Connecting I/O with FPGA are only 2 pins
  • No need to input clock to IP Lock logic
  • Provide easy "Laboratories Pack" and "IP Lock Writer + blank chip"

What is AES Cryptosystem ?

AES(Advanced Encryption Standard) is common key cryptosystem chosen by NIST, US. Both encryption and decryption are high speed. And it is also stronger than triple DES. So it is noticed as encryption standard for next generation replaced with DES. Currently AES is adopted with security for financial system, LAN system and so on.


Easy to start from Laboratories pack

Suitable for Prototype or Small lot Usage

Laboratories pack contains encryption chips which are already written unique ID at shipment by Design Gateway. No one can rewrite this fixed ID key. To avoid duplication, each Laboratories pack have different unique ID key, so user must use IP Lock core with encryption chips in same package. Design Gateway provide encryption chip 10pcs package (IPL-010L) and 30pcs package (IPL-030L). This product is suitable for prototype and small lot usage.

Contents of Laboratories pack:

  • Encryption chip 10pcs or 30pcs
  • CD-ROM
    • IP Lock core for Altera FPGA
    • IP Lock core for Xilinx FPGA
    • VHDL example source code
    • User Manual(PDF)
  • User Manual

Mass production support by Writer pack

User can set and write ID key for product

IP Lock Writher IPL-003WR

Writer pack is suitable for mass production. User can write any ID key to blank encryption chip by using IP Lock write. User can set and write optional ID key for each products or lot.
Writer pack contains blank chip 3pcs. For mass production, Design Gateway provide blank chip (IPL-CHP, MOQ=100pcs).

Contents of Writer pack (IPL-003WR):

  • IP Lock Writer
  • Blank Encryption chip 3pcs
  • USB cable
  • CD-ROM
    • Software for IP Lock writer (for writing ID key)
    • IP Lock core for Altera FPGA
      Blank Encryption chip IPL-CHP
    • IP Lock core for Xilinx FPGA
    • VHDL example source code
    • User Manual(PDF)
  • User Manual

Ordering Information

Laboratories pack

  • IPL-010L (contain encryption chip 10pcs with fixed ID key)
  • IPL-030L (contain encryption chip 30pcs with fixed ID key)

Writer pack

  • IPL-003WR (contain blank encryption chip 3pcs)
  • IPL-CHP (Blank chip for Writer pack, MOQ=100pcs)